Physics

Note:

Digital signals are denoted by 1 and 0 (or High and Low).

NOT gate:

Input | Output |

0 | 1 |

1 | 0 |

Input 1 | Input 2 | Output |

0 | 0 | 0 |

0 | 1 | 1 |

1 | 0 | 1 |

1 | 1 | 1 |

Input 1 | Input 2 | Output |

0 | 0 | 0 |

0 | 1 | 0 |

1 | 0 | 0 |

1 | 1 | 1 |

Input 1 | Input 2 | Output |

0 | 0 | 1 |

0 | 1 | 0 |

1 | 0 | 0 |

1 | 1 | 0 |

Input 1 | Input 2 | Output |

0 | 0 | 1 |

0 | 1 | 1 |

1 | 0 | 1 |

1 | 1 | 0 |

1. Size of the truth table is given by $2_{n}×n+m$ where $n:$ number of inputs and $m:$ number of outputs

2. List down all possible combinations of inputs in the truth table.

3. For each input, find output of each logic gate and fill in the truth table according to its behaviour moving along with the direction of signals.

Consider the circuit given in the figure. Its truth table is given by:

A | B | C ($=Aˉ$) | D ($=B.C$) | Q ($=B+D$) |

0 | 0 | 1 | 0 | 0 |

0 | 1 | 1 | 1 | 1 |

1 | 0 | 0 | 0 | 0 |

1 | 1 | 0 | 0 | 1 |

Construction of AND, OR and NOT gate using NAND gate is shown in the attached figure.